A leading quantitative trading firm is seeking an FPGA Engineer to join its crown-jewel trading desk as a specialist working on FPGA for their trading strategies. This role offers the opportunity to work on FPGA-based solutions that power high-performance, ultra-low-latency trading systems. Working alongside experienced engineers, you will contribute to the design, simulation, verification, and validation of hardware modules in a highly collaborative environment. Responsibilities A leading quantitative trading firm is seeking an FPGA Engineer to join its crown-jewel trading desk as a specialist working on FPGA for their trading strategies. This role offers the opportunity to work on FPGA-based solutions that power high-performance, ultra-low-latency trading systems. Working alongside experienced engineers, you will contribute to the design, simulation, verification, and validation of hardware modules in a highly collaborative environment. Assist in the development and maintenance of synthesizable SystemVerilog code for FPGA-based applications. Build and maintain comprehensive testbenches to verify hardware functionality and performance. Execute simulations, debug logic issues, and analyze waveform data to ensure design correctness. Develop Python-based automation tools and test scripts to improve validation and verification workflows. Support hardware deployments by analyzing real-time system data to identify design issues, timing concerns, and edge cases. Document design implementations, verification results, and testing procedures. Collaborate closely with senior engineers throughout the hardware development lifecycle. Requirements At least year of FPGA design experience working on the full life-cycle. Knowledge of SystemVerilog or Verilog for hardware design and verification. Experience using simulation and debugging tools such as ModelSim, Questa, or Vivado Simulator. Proficiency with Python for automation, scripting, and data analysis. Understanding of digital design fundamentals including synchronous logic, state machines, clock domain crossing, and FIFO architectures. Interest in financial technology, quantitative trading, or performance‑critical systems is preferred. #J-18808-Ljbffr
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